NPC’18 Proceedings and Program

The participants of the IFIP NPC 2018 conference have been promised to get free access to proceedings on SpringerLink for a period of 4 weeks.

The online version is now available: here

Thursday, November 29th
08:00-09:00 Registration
10:10-10:25 Coffee Break | Room: N404
10:25-12:30 Session 1: Deep Neural Network | Session Chair: Lei Wang ( NUDT ) | Room: N302
10:25-10:50
Training Deep Nets with Progressive Batch Normalization on multi-GPUs |
10:50-11:15
BSHIFT: A Low Cost Deep Neural Networks Accelerator |
11:15-11:40
On Retargeting the AI Programming Framework to New Hardwares |
11:40-12:05
Float-Fix: An Efficient and Hardware-Friendly Data Type for Deep Neural Network |
12:05-12:30
Data Fine-pruning: A Simple Way to Accelerate Neural Network Training |
12:30-14:00 Lunch Break
14:00-15:40 Session 2: Performance Analysis and Optimization | Session Chair: Huimin Cui ( ICT ) | Room: N302
14:00-14:25
HPC-SFI: System-level Fault Injection for High Performance Computing Systems |
14:25-14:50
GRAM: A GPU-based Property Graph Traversal and Query for HPC Rich Metadata Management |
14:50-15:15
ASW: Accelerating Smith-Waterman Algorithm on Coupled CPU-GPU Architecture |
15:15-15:40
GPU-Accelerated Clique Tree Propagation for Pouch Latent Tree Models |
15:40-16:00 Coffee Break | Room: N404
16:00-16:50 Session 3: Short Paper-I | Session Chair: Feng Zhang ( RUC ) | Room: N302
16:00-16:10
vGrouper: Optimizing the Performance of Parallel Jobs in Xen by Increasing Synchronous Execution of Virtual Machines |
16:10-16:20
GPU Memory Management Solution Supporting Incomplete Pages |
16:20-16:30
A Deep Learning Approach for Network Anomaly Detection based on AMF-LSTM |
16:30-16:40
FSObserver: A Performance Measurement and Monitoring Tool for Distributed Storage Systems |
16:40-16:50
Systolic Array Based Accelerator and Algorithm Mapping for Deep Learning Algorithms |
16:50-17:50 Session 4: Short Paper-II | Session Chair: Feng Zhang ( RUC ) | Room: N302
16:50-17:00
A Fine-grained Performance Bottleneck Analysis Method for HDFS |
17:00-17:10
Mimir+: An Optimized Framework of MapReduce on Heterogeneous High-Performance Computing System |
17:10-17:20
DLIR: An Intermediate Representation for Deep Learning Processors |
17:20-17:30
Leveraging Subgraph Extraction for Performance Portable Programming Frameworks on DL Accelerators |
17:30-17:40
Labeled Network Stack: A Co-Designed Stack for Low Tail-Latency and High Concurrency in Datacenter Services |
17:40-17:50
Balancing the QOS and Security in Dijkstra Algorithm by SDN Technology |
18:30 Reception
Friday, November 30th
10:00-10:15 Coffee Break | Room: N302
10:15-12:20 Session 5: Big Data and Cloud Computing | Session Chair: Shanjiang Tang ( TJU ) | Room: N401
10:15-10:40
Lightweight and Accurate Memory Allocation in Key-value Cache |
10:40-11:05
KT-Store: A Key-Order and Write-Order Hybrid Key-Value Store with High Write and Range-query Performance |
11:05-11:30
ALOR: Adaptive Layout Optimization of Raft Groups for Heterogeneous Distributed Key-Value Stores |
11:20-11:55
A Dependency-Aware Storage Schema Selection Mechanism for In-Memory Big Data Computing Frameworks |
11:55-12:20
Migration Cost and Energy-aware Virtual Machine Consolidation under Cloud Environments Considering Remaining Runtime |
12:20-14:00 Lunch Break
14:00 Local Tour
18:30 Banquet
Saturday, December 1st
09:00-10:40 Session 6: Networking | Session Chair: Kejiang Ye ( SIAT ) | Room: J107
09:00-09:25
CNLoc: Channel State Information Assisted Indoor WLAN Localization Using Nomadic Access Points |
09:25-09:50
HARE: History-Aware Adaptive Routing Algorithm for Endpoint Congestion in Networks-on-Chip |
09:50-10:15
Improving the performance of distributed MXNet with RDMA |
10:15-10:40
An Efficient Method for Determing Full Point-to-point Latency Of Arbitrary Indirect HPC Networks |
10:40-10:55 Coffee Break | Room: J205
10:55-12:35 Session 7: Application and Algorithm | Session Chair: Hailong Yang ( BUAA ) | Room: J107
10:55-11:20
ElasticActor: An Actor System with Automatic Granularity Adjustment |
11:20-11:45
Register-Aware Optimizations for Parallel Sparse Matrix-Matrix Multiplication |
11:45-12:10
Optimizing Sparse Matrix-Vector Multiplications on An ARMv8-based Many-Core Architecture |
12:10-12:35
STrieGD: A Sampling Trie Indexed Compression Algorithm for Large Scale Gene Data |